Supply, Delivery and Installation of Wafer-Level Optical Tester

Tender description

Background The UK urgently requires a sovereign, open-access advanced semiconductor packaging capability to close a well-evidenced market failure. Today, UK innovators in photonics and power electronics rely on overseas Outsourced Semiconductor Assembly and Test (OSAT) facilities for scaling to volume packaging, which fragments the supply chain, extends lead times, increases Intellectual Property (IP) leakage risk, and exposes critical technologies to geopolitical disruption. The National Centre for Advanced Semiconductor Packaging (NCASP) is the missing link that converts research excellence into manufacturable products. NCASP is creating an integrated, industry-led scale-up facility that connects UK device design to domestic, high-volume packaging, test and metrology – reducing time-to-market and anchoring value onshore. Description The University of Strathclyde has a requirement for wafer-level optical tester(s) capable of performing characterization of both surface-emitting Distributed Feedback (DFB) laser arrays and silicon photonic integrated circuits (PICs). Lot 1: Background The UK urgently requires a sovereign, open-access advanced semiconductor packaging capability to close a well-evidenced market failure. Today, UK innovators in photonics and power electronics rely on overseas Outsourced Semiconductor Assembly and Test (OSAT) facilities for scaling to volume packaging, which fragments the supply chain, extends lead times, increases Intellectual Property (IP) leakage risk, and exposes critical technologies to geopolitical disruption. The National Centre for Advanced Semiconductor Packaging (NCASP) is the missing link that converts research excellence into manufacturable products. NCASP is creating an integrated, industry-led scale-up facility that connects UK device design to domestic, high-volume packaging, test and metrology – reducing time-to-market and anchoring value onshore. Description The University of Strathclyde has a requirement for wafer-level optical tester(s) capable of performing characterization of both surface-emitting Distributed Feedback (DFB) laser arrays and silicon photonic integrated circuits (PICs).